A successive approximation register (SAR) analog-to-digital converter (ADC) is a type of analog-to-digital converter that converts a continuous analog waveform into discrete digital representations by performing a binary search to converge to the closest quantization level of each sample taken of the analog waveform then providing a digital representations thereof. SAR ADCs are among the most popular ADC architectures, and may be used in, for example, microcontrollers.
An ADC, generally, is expected to make offset-free measurements. Methods for offset calibration include digital offset correction in post-processing, analog offset correction using an offset compensated comparator, and hybrid digital/analog offset correction using a dedicated compensation digital-to-analog convertor (DAC). Digital correction is simplest but has a fundamental limitation in that it limits the ADC's signal range. Analog correction using an offset compensated comparator or hybrid correction using a dedicated correction DAC is therefore widely used, but substantially increases the circuit complexity.
Some solutions for offset calibration include digital offset correction in post-processing, analog offset correction using an offset compensated comparator, and hybrid digital/analog offset correction using a dedicated compensation DAC. Digital correction may be simple but may have a fundamental limitation in that digital correction limits the ADC's signal range. Analog correction using an offset compensated comparator or hybrid correction using a dedicated correction DAC may be used, but these approaches may substantially increase the circuit complexity.
FIG. 1 illustrates three prior technology methods to perform offset correction. FIG. 1(a) shows a circuit for digital offset correction. Digital offset correction, when post processing the output data, is the simplest method, but it limits the range of the ADC since it shifts the whole ADC transfer function, thereby changing its saturation limits. It may include measuring the offset and compensating for it digitally in post-processing.
FIG. 1(b) shows a circuit for analog offset correction. Fully analog offset correction using an offset compensated comparator circumvents the problem with the aforementioned digital offset correction method and is also commonly used, e.g., in the SAR ADC for a microcontroller. Analog correction does not limit the ADC's range. This can be done in the background with extra clock cycles. However, it substantially increases the complexity of the comparator, often increasing its integrated circuit area greatly.
FIG. 1(c) shows a circuit for hybrid analog/digital offset correction. This method uses a hybrid (analog/digital) correction with a separate correction DAC, so the offset can be subtracted after being measured and stored. This also does not limit the ADC's range, but it adds substantial complexity due to the need of a dedicated correction DAC. Hybrid correction may include measuring offset and compensating in the analog domain with the correction DAC.